Analysis of D-Q Small-Signal Impedance of Grid-Tied Inverters
Virginia Tech · University of Padua
Abstract
This paper analyzes the small-signal impedance of three-phase grid-tied inverters with feedback control and phase-locked loop (PLL) in the synchronous reference (d-q) frame. The result unveils an interesting and important feature of three-phase grid-tied inverters - namely, that its q-q channel impedance behaves as a negative incremental resistor. Moreover, this paper shows that this behavior is a consequence of grid synchronization, where the bandwidth of the PLL determines the frequency range of the resistor behavior, and the power rating of the inverter determines the magnitude of the resistor. Advanced PLL, current, and power control strategies do not change this feature. An example shows that under weak…
Citation impact
- FWCI
- 67.13
- Percentile
- 100%
- References
- 47
Authors
5Topics & keywords
- Phase-locked loop
- Resistor
- Inverter
- Electrical impedance
- Bandwidth (computing)
- Control theory (sociology)
- Output impedance
- Electronic engineering
- Affordable and clean energy