Chisel
University of California, Berkeley · Berkeley College
Abstract
In this paper we introduce Chisel, a new hardware construction language that supports advanced hardware design using highly parameterized generators and layered domain-specific hardware languages. By embedding Chisel in the Scala programming language, we raise the level of hardware design abstraction by providing concepts including object orientation, functional programming, parameterized types, and type inference. Chisel can generate a high-speed C++-based cycle-accurate software simulator, or low-level Verilog designed to map to either FPGAs or to a standard ASIC flow for synthesis. This paper presents Chisel, its embedding in Scala, hardware examples, and results for C++ simulation, Verilog emulation and…
Citation impact
- FWCI
- 19.04
- Percentile
- 100%
- References
- 6
Authors
8- JBJonathan BachrachCorresponding
University of California, Berkeley, Berkeley College
- HTHuy T. Vo
University of California, Berkeley, Berkeley College
- BRBrian Richards
University of California, Berkeley, Berkeley College
- YLYunsup Lee
Berkeley College, University of California, Berkeley
- AWAndrew Waterman
Berkeley College, University of California, Berkeley
Topics & keywords
- Computer science
- Verilog
- Parameterized complexity
- Programming language
- Scala
- Chisel
- Hardware description language
- Application-specific integrated circuit