articleIEEE Journal of Solid-State CircuitsJan 1, 2002Closed access

Impact of die-to-die and within-die parameter fluctuations on the maximum clock frequency distribution for gigascale integration

Intel (United States) · Georgia Institute of Technology

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Abstract

A model describing the maximum clock frequency (FMAX) distribution of a microprocessor is derived and compared with wafer sort data for a recent 0.25-/spl mu/m microprocessor. The model agrees closely with measured data in mean, variance, and shape. Results demonstrate that within-die fluctuations primarily impact the FMAX mean and die-to-die fluctuations determine the majority of the FMAX variance. Employing rigorously derived device and circuit models, the impact of die-to-die and within-die parameter fluctuations on future FMAX distributions is forecast for the 180, 130, 100, 70, and 50-nm technology generations. Model predictions reveal that systematic within-die fluctuations impose the largest performance…

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Authors

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Topics & keywords

Keywords
  • Die (integrated circuit)
  • Allan variance
  • Microprocessor
  • Standard deviation
  • Variance (accounting)
  • Physics
  • Statistics
  • Engineering
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