A detailed and flexible cycle-accurate Network-on-Chip simulator
Stanford University · Google (United States) · +4 more institutions
Abstract
Network-on-Chips (NoCs) are becoming integral parts of modern microprocessors as the number of cores and modules integrated on a single chip continues to increase. Research and development of future NoC technology relies on accurate modeling and simulations to evaluate the performance impact and analyze the cost of novel NoC architectures. In this work, we present BookSim, a cycle-accurate simulator for NoCs. The simulator is designed for simulation flexibility and accurate modeling of network components. It features a modular design and offers a large set of configurable network parameters in terms of topology, routing algorithm, flow control, and router microarchitecture, including buffer management and…
Citation impact
- FWCI
- 72.03
- Percentile
- 100%
- References
- 36
Authors
7- NJNan JiangCorresponding
Stanford University
- JBJames Balfour
Google (United States), Stanford University
- DBDaniel Becker
Lawrence Berkeley National Laboratory, Stanford University
- BTBrian Towles
Google (United States), D. E. Shaw Research
- WJWilliam J. Dally
Nvidia (United Kingdom), D. E. Shaw Research, Stanford University
Topics & keywords
- Modular design
- Computer science
- Network on a chip
- Computer architecture simulator
- Router
- Network simulation
- Flexibility (engineering)
- Embedded system
- Industry, innovation and infrastructure