Physics-Inspired Optimization for Quadratic Unconstrained Problems Using a Digital Annealer

The Fujitsu Digital Annealer is designed to solve fully connected quadratic unconstrained binary optimization (QUBO) problems. It is implemented on application-specific CMOS hardware and currently solves problems of up to 1024 variables. The Digital Annealer's algorithm is currently based on simulated annealing; however, it differs from it in its utilization of an efficient parallel-trial scheme and a dynamic escape mechanism. In addition, the Digital Annealer exploits the massive parallelization that custom application-specific CMOS hardware allows. We compare the performance of the Digital Annealer to simulated annealing and parallel tempering with isoenergetic cluster moves on two-dimensional and fully…

• NS
  National Science Foundation

  Awards: 1151387, DMR-1151387
• OO
  Office of the Director of National Intelligence

  Award: IA1-1198
• IA
  Intelligence Advanced Research Projects Activity

  Award: IA1-1198
• DO
  Division of Materials Research

  Award: 1151387