Aligned, high-density semiconducting carbon nanotube arrays for high-performance electronics
Peking University · Hunan Institute of Engineering · +2 more institutions
Abstract
Single-walled carbon nanotubes (CNTs) may enable the fabrication of integrated circuits smaller than 10 nanometers, but this would require scalable production of dense and electronically pure semiconducting nanotube arrays on wafers. We developed a multiple dispersion and sorting process that resulted in extremely high semiconducting purity and a dimension-limited self-alignment (DLSA) procedure for preparing well-aligned CNT arrays (within alignment of 9 degrees) with a tunable density of 100 to 200 CNTs per micrometer on a 10-centimeter silicon wafer. Top-gate field-effect transistors (FETs) fabricated on the CNT array show better performance than that of commercial silicon metal oxide-semiconductor FETs…
Citation impact
- FWCI
- 24.68
- Percentile
- 100%
- References
- 56
Authors
13Topics & keywords
- Carbon nanotube
- Materials science
- Wafer
- Nanotechnology
- Silicon
- Transistor
- Electronics
- Micrometer