TPP: Transparent Page Placement for CXL-Enabled Tiered-Memory
University of Michigan–Ann Arbor · Nvidia (United States)
Abstract
The increasing demand for memory in hyperscale applications has led to memory becoming a large portion of the overall datacenter spend. The emergence of coherent interfaces like CXL enables main memory expansion and offers an efficient solution to this problem. In such systems, the main memory can constitute different memory technologies with varied characteristics. In this paper, we characterize memory usage patterns of a wide range of datacenter applications across the server fleet of Meta. We, therefore, demonstrate the opportunities to offload colder pages to slower memory tiers for these applications. Without efficient memory management, however, such systems can significantly degrade performance.
Citation impact
- FWCI
- 87.44
- Percentile
- 100%
- References
- 35
Authors
10Topics & keywords
- Computer science
- Memory management
- Interleaved memory
- Computer architecture
- Operating system
- Semiconductor memory
- Distributed computing